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Hi Again on STM32F303RE-QFP64, The only available channels to connect an Analog input (in FC7), are the following: ADC12_IN6 (PC0) ADC12_IN7 (PC1) ADC12_IN8 (PC2) ADC12_IN9 (PC3) ADC1_IN1 (PA0) ADC1_IN2 (PA1) ADC1_IN3 (PA2) ADC1_IN4 (PA3) All other ADC channels are missing from the properties panel....

Hi The new file works flawlessly and thank you. Answering to your questions: I had never a compiler error with the old file. I have an application board equipped with the STM32F303RE - QFP64 which I try to program and on which I make all of the tests. BTW, I did the selection of this micro because o...

Hi
Actually I haven't problem with Disable PWM as I found out that, for my application instead of disabling it is better to change the duty cycle to "0" (LED off) and again back to "11719" (LED blinks 0.5sec). In this way, the code runs faster.
However, it is good to fix this bug if exists.

Thanks

Hi everyone I use a PWM channel to blink an LED at a rate of ON=0.5sec / OFF=0.5sec. With Period=23438, prescaler=1024, and Duty=11719 the above is accomplished (for SysCLK=24MHz as is the default FC7 setting). The sequence is: 1. PWM Enable 2. Set Duty cycle 10bit Later I want to terminate this PWM...

Hi Leigh

Yes, it is working flawlessly on my actual hardware.

Thanks a lot

FYI: On the FC7 simulator doesn't work.

The corresponding configuration register for the PB11 is the SYSCFG_EXTICR3 bits 12,13,14,15 (EXTI11).
In the end, is noticed that some IO pins may not be available on small packages.
Is that the case?
Thanks

Hi
The STM32F303RE (QFP64)
Now I'm looking on the datasheet at the SYSCFG_EXTCRIx registers.

Hi everyone I have connected a tactile switch at port PB11, which is active low. I try to enable an interrupt on this port. I can't see a particular selection of pin PB11. The port B includes 15 I/O pins and FC7 offers port interrupt only for pins EXTI0, EXTI1, EXTI2, EXTI3, EXTI4, EXTI8, and EXTI13...

Hi again To be more precise, If I select NumSamples = 200 and DelayUs = 200 then I will have 6 samples of the square pulse, per each full period (1msec=1,000usec) as is presented in the following picture? And that the 200 samples will be completed in: 5 samples / 1000us => 200 samples in 40 X 1000 =...

Hi everyone I try to get the peak voltage of a pulse with fixed F=1KHz. The peak voltage and the duty cycle can be changed but during the ADC conversion are stable. The more precise way I found so far, is to get the voltage as an averaged integer ("GetAverageInt" in FC). Then I use the formula Vpeak...

Hi Ben There is no problem. I had two separate FC for the two SPI slaves which I combined in a new FC. During copy-paste from the two old FC, both slaves were assigned to "cal_spi1" in the new FC. I changed the second slave to "cal_spi2" and now the new FC is working flawlessly. Sorry for the confus...

Hi everyone In a P16F18877 I've tried either the SPI CH1 or the SPI CH2 working as standalone with success. Today I tried both SPI channels, with the same settings, working simultaneously. The SPI CH2 does not work. The SPI CH1 is working just fine. I checked the SPI2 bus with the scope and there ar...

Hi everyone
The definitions of the PPS module are correct, without bugs within FC7.
Just now I modified the FCF to fit on SX1262 which of the Register map and Read/Write access is completely different from this of SX1272.
Thanks for the help

Hello, The code in the latest v7 16F18877 definition file looks ok to me compared to the v8 files. https://www.matrixtsl.com/mmforums/viewtopic.php?f=63&t=19743 Which pins are you trying? Hi Ben Thanks for the confirmation. RB.1 = SCK_2 RB.2 = MOSI_2 RB.3 = MISO_2 RB.4 = SS_2 I had ordered two RF-S...

Hello, PIC16F18877 is probably not the only one to have problem on SPI harware channel. I had the same issue with PIC16LF26K80 communicating with an SPI display gLCD_SSD1331: on Channel 1 it didn't work but on Software was ok. Could it be a common problem? Regards Giuseppe Hi Giuseppe Regarding P16...

Doesn't work
I will try later writing C code

Hi, Thanks for the further information. I have been checking the C code for the remap against the datasheet and all looks OK so far. If the issue is blocking your work, could you try setting software SPI mode in the component and continue with that for your LoRa testing for now? Hi You mean that in...

I'm working with a PIC16F18877 - TQFP44.

The Peripheral Pin Select (PPS) module is working OK?

I have troubles to remap the SPI CH1 and SPI CH2.

Please see this topic:
viewtopic.php?f=68&p=95426#p95426

Thanks

Good morning I found bug and in SPI CH1. Just to remember that we talk for the P16F18877. The CH1 is working flawlessly with the following component properties: MOSI = RC.4 MISO = RC.5 SCK = RC.3 This is not the default mapping of CH1 after reset. I exchanged the mapping of MOSI - MISO and now the C...

Hi I placed SPI components on both SPI channels and compiled the code so you could make a line by line comparison of the definitions in C. Here the definitions of SPI CH1: /*========================================================================*\ Use :cal_spi1 :Variable declarations :Macro functio...

I can confirm that the "Sample Point = Middle of the bit" is working just fine with the other peripheral ATM90E32 connected at SPI Channel 1. That's interesting, I'll have a chat with Ben just to make sure my recollection of the issue is correct Can you just confirm: You are using Flowcode V7 and a...

Hi, Only comment I can offer is, don't use Sample Point = Middle with 16F18877, it does not work, but returns the first bit read for all the byte, which seems to be the case with your 0 and 0xFF Hope that helps Leigh Thanks, Leigh I can confirm that the "Sample Point = Middle of the bit" is working...

Hi everyone In my hardware, the SCK 2 and SDI 2 (MOSI) are mapped to the default ports RB.1 and RB.2 respectively. The SDO 2 (MISO) is mapped to RB.3. Only the SS 2 is remapped to RB.4 instead of the default port RB.0 Today I tried any possible change on FC. In both SPI Write and SPI Read macros I a...

Attached is a small FCF with the SPI macros. You could see the last SPI Write 0x01 to SX1272 OpMode Register (Address 0x01). I try to Read it later and returns 194d (0xC2) instead of 1d (0x01). The same applies to the Version Register (0x42), in SPI Read returns 194d (0xC2) instead of 0x22 (34d) whi...

The application system clock is the P16F18877 INTOSC running at 8MHz. The SCK prescaler is set to Fosc/16 so the SCK = 500KHz. In the previous post, you could see on the FC pics the setup time from SS Enable (CS Low) to MOSI and MOSI to CS High that is 5μsec. I think both are within the range of SX1...