Works in VLAB, not in E-Blocks

[timmydavie]

First, apologies if this has been solved before: A quick search couldn't find the result.

I'm in the process of doing my Electronics Coursework, which is done using ASM4PICsv4.
I created my program, and found that VLAB didn't have enough RA ports (My program used all 8, VLAB only supports 5). We then decided to upload my program onto the E-Block boards with a PIC16f88. My program didn't work however, and just alternated RA1 and RA5 on and off.
I decided then to try to upload the simplest part of my program: a section that tests RA5, and while RA5 is set, set RB5
However, on the E-block, nothing happened. The software reported that the code had been uploaded correctly, and there were no errors, but the entire system just refused to work.
I then attempted to simulate the simple-code, and that's where major problem #1 occurred.
This is the code for the simple program:

Code: Select all

	LIST P=16F88
	__CONFIG H'2007', H'3F7A'       ; RC mode
	__CONFIG H'2008', H'3FFC'       ; Clock Fail-Safe disabled


#DEFINE	PORTA	05	;PORTA is in location 05 (PAGE0,05)
#DEFINE	TRISA	85	;TRISA is in location 85 (PAGE1,05)
#DEFINE	PORTB	06	;PORTB is in location 06 (PAGE0,06)
#DEFINE	TRISB	86	;TRISB is in location 86 (PAGE1,06)
#DEFINE	STATUS	03	;STATUS is in location 03

#DEFINE	Z	02	;Z flag is bit 02
#DEFINE	C	00	;C flag is bit 00

	ORG	0		; Reset vector
	GOTO	5		; Goto start of program
	ORG	4		; Interrupt vector
	GOTO	5		; Goto start of program
	ORG	5		; Start of program memory


start	BSF	STATUS,5	;Select PAGE1 register set
	MOVLW	b'11111111'	;Set port A data direction (INPUT)
	MOVWF	TRISA
	CLRF	TRISB		;Set port B data direction (OUTPUT)
	BCF	STATUS,5	;Select PAGE0 register set
	clrf	PORTB

MAN	BTFSC	PORTA,4	;Test the input attached to RA5 (Show)
	BSF	PORTB,4	;If set, set Output to SHOW
	BTFSS	PORTA,4	;Test the input attached to RA5 (Show)
	BCF	PORTB,4	;If not, set Output to HIDE
	goto	MAN	;Debug		
	END

but this is what the simulator received:

Code: Select all

	radix hex

; Register Definitions:
INDF    EQU H'00'
TMR0    EQU H'01'
PCL     EQU H'02'
STATUS  EQU H'03'
FSR     EQU H'04'
PORTA   EQU H'05'
PORTB   EQU H'06'
EEDATA  EQU H'08'
EEADR   EQU H'09'
PCLATH  EQU H'0A'
INTCON  EQU H'0B'
OPSHUN  EQU H'81'
TRISA   EQU H'85'
TRISB   EQU H'86'
EECON1  EQU H'88'
EECON2  EQU H'89'


; Constant Definitions:


; Program Start:
        ORG H'0'

        GOTO   H'005'            ; Goto start of program
        __CONF H'08', H'3FFC'    ; Clock Fail-Safe disabled
        NOP                   
        NOP                   
        GOTO   H'005'            ; Goto start of program

start   BSF    H'3'	,05          ;Select PAGE1 register set
        MOVLW  H'FF'             ;Set port A data direction (INPUT)
        MOVWF  H'85'             
        00     H'LRF'	86         ;Set port B data direction (OUTPUT)
        B00    H'3'	,05          ;Select PAGE0 register set
        00     H'lrf'	06         

MAN     BTFS00 H'5'	,04          ;Test the input attached to RA5 (Show TGT)
        BSF    H'6'	,04          ;If set, set MOTOR to SHOW
        BTFSS  H'5'	,04          ;Test the input attached to RA5 (Show TGT)
        B00    H'6'	,04          ;If not, set MOTOR to HIDE
        goto   MAN            ;Debug						;<--------------------------------DEBUG

        END

As you can see, every letter C has been replaced with 00 - even in the operands.
I changed the program, and got this bit of code to work perfectly in the simulator:

Code: Select all

	LIST P=16F88
	__CONFIG H'2007', H'3F7A'       ; RC mode
	__CONFIG H'2008', H'3FFC'       ; Clock Fail-Safe disabled


	ORG	0		; Reset vector
	GOTO	5		; Goto start of program
	ORG	4		; Interrupt vector
	GOTO	5		; Goto start of program
	ORG	5		; Start of program memory


start	BSF	3,5		;Select PAGE1 register set
	MOVLW	b'11111111'	;Set port A data direction (INPUT)
	MOVWF	85
	CLRF	86		;Set port B data direction (OUTPUT)
	BCF	3,5		;Select PAGE0 register set


loop	bsf	6,0		;Set RB0
	btfsc	5,1		;Test RA1
	bsf	6,1		;If set, RB1
	goto	loop		;Goto loop



END

Where I completely removed all labels and just pointed to the actual locations of the files themselves. (My teacher had been checking this all along, and can't see where this was going wrong)
Programmed to the board, the result was that RB0 was lit, but pressing RA1 had no effect.
Did an export from VLAB, assembled the file in ASM-IDE, and programmed that through PPPv3, the result was that RB0 was lit, and RB1.
Did the same thing again onto a different board, RB0 lit, RA1 had no effect.
I tried again with names instead of locations, with the definitions' (I.E PORTA to 05, TRISA to 85, PORTB to 06, TRISB to 86) and no change.

We have no idea what to do from here, we've exhausted all avenues we can think of.
At no point is an error shown from any of the software, and when we program an exercise from within ASM4PICsV4 it works flawlessly. We've checked through the code, and see no errors. We've tried changing the _CONFIG headers (copypaste from Exercise 9.1) to no avail.
Could someone please advise on what to try next/what to do? I'm the only one to get this far in this class at this time (I've done this before, am resitting the course to bump my grades up), and there's a genuine concern for when the rest of the class attempt to do similar.

Thanks,
James

[medelec35]

Hi James,
This is just a pure guess, but watchdog timer defaults to enabled & MCLR defaults to external.
So what about adding a configuration line to disable watchdog timer?

Also if MCLR pin is open circuit, then you can either add a resistor (if not already present) form MCLR to +5V or add a configuration line to set MCLR aa internal.

Finally Low voltage programming will also require disabling.

Martin

[timmydavie]

Hi Martin, thanks for the quick reply.
With this particular bit of software MCLR defaults to internal, WDT is disabled (along with the other various timers, and Low Voltage is disabled. These were also checked before programming started.
Thanks,
James

[medelec35]

Hi James,
Not tried what your doing so I did not know that WDT was set to off as default.
Out of interest would you mind posting the hex file that was used for programming your 16F88 so I can see what could be going on.

I don't give up too easily

[timmydavie]

Hi, thanks for taking such an interest in this, if you can figure this out then you'll be a lifesaver!
Here's the contents of the .HEX file that was uploaded (the simple test code)

Code: Select all

:020000040000FA
:020000000528D1
:0800080005288316FF30850076
:0C001000860183120614851886140A2845
:02400E007A3FF7
:02401000FC3F73
:00000001FF

[medelec35]

Hi James,
Two things I have noticed from the hex file is
1) Port A is still defaulted to analogue, not set to digital,
2) Yes WDT is disabled, but MCLR is set to external and not internal

LVP is also disabled which is what you have stated.

For the digital part you can use:
BANKSEL ANSEL ;
MOVLW 0x00 ;
MOVWF ANSEL

With the additional code, PortB1 should go high when portA1 goes high.
Making A1 go low will have no effect on PortB1

Hope this helps?

Martin

[timmydavie]

So if I were to use this code, and double check the MCLR Setting when I go to upload it, the problem *might* be solved?

Code: Select all

   LIST P=16F88
   __CONFIG H'2007', H'3F7A'       ; RC mode
   __CONFIG H'2008', H'3FFC'       ; Clock Fail-Safe disabled

	ORG	0		; Reset vector
	GOTO	5		; Goto start of program
	ORG	4		; Interrupt vector
	GOTO	5		; Goto start of program
	ORG	5		; Start of program memory

start   BSF	3,5		;Select PAGE1 register set
	MOVLW	b'11111111'	;Set port A data direction (INPUT)
	MOVWF	85
	CLRF	86		;Set port B data direction (OUTPUT)
	CLRF	9b		;Clear ANSEL Register Location
	BCF	3,5		;Select PAGE0 register set

loop	bsf	6,0		;Set RB0
	btfsc	5,1		;Test RA1
	bsf	6,1		;If set, RB1
	goto	loop		;Goto loop

END

I shall check that tomorrow morning, and report back on the results!

Have you any idea's on the other problem, the one regarding ASMIDE changing the code before being uploaded? (I.E When I had #DEFINE C 00 so I could clear the C register of STATUS, the command BCF becomes B 00 F and so forth?

Thanks,
James

[medelec35]

Hi James,
Yes CLRF 0x9b while bank select register is set should do the job.

Not sure on the other issue, as i'm not experienced at all with whats going on.

[timmydavie]

Thanks, it worked! Sorry for long delay, forgot about the post until now.
I found by clearing ANSEL, and clearing PORTA/PORTB in page 0, all problems went away!

Thanks,
James