Programming a 12F675 with internal MCLR and internal clock
Posted: Fri Aug 13, 2010 2:23 pm
When programming a 12F675 device which has been configured with an internal clock and an internal MCLR the default PPP settings will not work to correctly program the device.
To get around this problem go into PPP and click options.
From Flowcode --- Chip -> Configure -> Options
From PPP itself --- Options -> Options
Under the Vdd switching options tick the manual override option and then select the option Raise Vdd after Vpp.
Then click Ok.
This change may also help when programming other devices with internal MCLR and internal clock such as the 16F883.
Remember to disable the manual override functionality when using another device to allow PPP to function correctly.
In some cases it is also nessisary to disable the retain OSCCAL setting. You may want to store the OSCCAL setting into EEPROM etc before disabling this setting and then you can read it back at any time.
To get around this problem go into PPP and click options.
From Flowcode --- Chip -> Configure -> Options
From PPP itself --- Options -> Options
Under the Vdd switching options tick the manual override option and then select the option Raise Vdd after Vpp.
Then click Ok.
This change may also help when programming other devices with internal MCLR and internal clock such as the 16F883.
Remember to disable the manual override functionality when using another device to allow PPP to function correctly.
In some cases it is also nessisary to disable the retain OSCCAL setting. You may want to store the OSCCAL setting into EEPROM etc before disabling this setting and then you can read it back at any time.