Incorrect interrupt frequency shown in FC 4 AVR for AVR chip

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nils
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Incorrect interrupt frequency shown in FC 4 AVR for AVR chip

Post by nils »

Hello,

As I was going through interrupts, I noticed that the settings for TMR0 Overflow interrupts are not showing any difference when going through prescaler values.
Image

Is this a bug, as I remember this working correct in FC v3 for the AVR.

Kind regards,
Nils
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Sean
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Re: Incorrect interrupt frequency shown in FC 4 AVR for AVR

Post by Sean »

The problem seems to caused by some missing information in the files that describe the target devices.

Here is a modified version of the ATmega324P file.
ATMEGA324P.fcd
(7.84 KiB) Downloaded 456 times
This file should be copied into the FCD folder of the Flowcode AVR V4 installation (with Flowcode not running).

Details:
The existing [TMR0] section of each .fcd file requires the following lines adding

MaxTimerOverflow=256
PrescaleOpt=1

Example:

[TMR0]
Name="TMR0 Overflow"
UseExplicitHandlerCode=1
FlagReg=
FlagBit=
HandlerCode="#ifndef MX_TIMER0OVF_HANDLER\n#define MX_TIMER0OVF_HANDLER\nISR(TIMER0_OVF_vect)\n{\n\tFCM_%n();\n}\n#else\n#warning The <TIMER0 OVF> interrupt has previously been enabled, so the macro <%n> may never get called.\n#endif\n"
UseExplicitEnableCode=1
EnReg=
EnBit=
EnableCode="TIMSK0 |= (1 << TOIE0);\n"
DisableCode="TIMSK0 &= ~(1 << TOIE0);\n"
OptCnt=1
TmrOpt=1
MaxTimerOverflow=256
PrescaleOpt=1

Opt1="Clock Source & Prescaler Select"
Opt1Cnt=8
:
:
:
:

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