FC IDE coding error for INT1/REMAP in PIC24FJ64GB004 Family

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bernoulli
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FC IDE coding error for INT1/REMAP in PIC24FJ64GB004 Family

Post by bernoulli »

Error within the FC IDE coding for the INT1/REMAP with the PIC24FJ64GB004 family. The attach file illustrates the problem area. I believe the problem lies within the chip file information and not within the main FC IDE software

Basically, the FC IDE is using bits 0-4 of the RPINR0 register when it should be bits 8-12.

The FC IDE is correctly using the register bits for INT2/REMAP, which are bits 0-4 of the RPINR1 register.
Attachments
INT1_Test_PIC24FJ64GB002__PLL_clock_8_MHz.fcfx
(16.18 KiB) Downloaded 237 times

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Benj
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Re: FC IDE coding error for INT1/REMAP in PIC24FJ64GB004 Fam

Post by Benj »

Hello,

Many thanks for letting us know I have had a good go through the definition files and fixed the same problem on a number of devices.

Here is the new v7 definition file, simply copy to your "Flowcode 7/FCD/PIC16BIT" folder and restart Flowcode.
24FJ64GB004.fcdx
(36.66 KiB) Downloaded 228 times
I will post the other updated files on the v7 updates thread.

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