spi pic to pic

[brandonb]

using spi, how would the master get information from another pic acting as a slave? it seems that spi macro has only master functionality, would like to have something simular to uart but with spi as its super fast

[Benj]

Hello Brandon,

We have not yet implemented a SPI slave using Flowcode but this is on the list.

One of our users implemented I2C slave on the following topic.

http://www.matrixmultimedia.com/mmforum ... f=7&t=7081

It should be possible to do SPI slave using C icons to modify the setup of the SPI register SSPCON1 though there may be other things that need to be altered to allow this to work.

[brandonb]

We have not yet implemented a SPI slave using Flowcode but this is on the list.

just curious ben, when are we to expect rx receive macros for spi and i2c, is that v6 or sooner, sounds like a lot of work either way

[Benj]

Hello Brandon,

Certainly won't be a v5 thing I'm afraid unless someone wants to work out all the C code for us

Hopefully it will be very easy to make components in v6 so I am hoping we will add loads to this once it has been released and we have a bit more free time.

[STibor]

Up the topic.
I would be very happy if we had SPI slave configuration.

[STibor]

SPI Slave example.

[brandonb]

working spi master slave, this is a simple test but you can see how this can be expanded to send and process any instruction, and send back as many bytes the master is programmed to send....
it is important when sending message to slave that at least a 1ms delay is used
here is master code

16f1939 spi master.fcf

(9.5 KiB) Downloaded 336 times

here is slave

16f1939 spi slave.fcf

(13.47 KiB) Downloaded 329 times

operation:
master sends 15, waits 1ms then gets byte
slave is waiting for ss pin(A5) to go low, then clocks in bytes as master provides clock, spi_cnt variable is initialized as zero, in the isr when you'll see if( !(spi_cnt)) what this does is when the first byte comes it it processes the command with if statements by linking variables and writing the sspbuf, when it writes sspbuf on the next message it will send this data out when the clock arrives,
in the isr in this case its a simple example and only expected to see two bytes per message which is instruction followed by one slave sent byte, so a spi_cnt variable is incremented inside the isr as to ensure that if two bytes are followed that the first byte is the instruction and the second byte it sends the data, after it sends the data the spi_cnt variable is >1 so it returns to zero for the next set of data bytes that occur..... all pins config stuff and enable code is done in the interrupt icon code, it can easily be adapted to other pic chips.... cheers