Matrix user forums

Thanks Kersing. I believe I've had a brain-crash... Initially I'd thought about sensing the status of RE2 (Vbus presence) and resetting registers accordingly in code - which sent me off at a tangent. For some reason, working into the small hours, I'd fixated on the notion that the ECIO40P16 target m...

I'm using an ECIO40P16 module to train a college student, the project involving a range of I2C coupled sensors, TTL232 to a radio module, battery charging circuit, and batteries. To characterise sensor responses for later embedded settings, the first phase will be to USB-program and power the ECIO m...

I can sooo relate to Ben's 'key points'. I've started off being 'too' clever with unnecessarily modular code (with many macros) in the past, only to sorely regret doing so as the code developed with later changes necessary. On one occasion, it got so confusing that I threw the source away and starte...

Hi Ben.

Very many thanks for clearing that up

I was about to commit to copper without room for ambiguity, and understand what 'ECIO' was referring to now.

All the best,

Brendan

I'm probably being stupid but, trying to positively associate ECIO40P16 pin numbers with uC port pins, I've no idea why, in the datasheet, some of the brackets identify totally different port IDs to the norm. I don't presently have a module to-hand to confirm one way or the other. Adding further to ...

Thanks Ben.

I can confirm download and use of the PIC-specific update, with all associated pin-selectable options present and correct. Furthermore, muxed bank select table created in the flow, and the project builds successfully

I'll update all to the latest zip.

Many thanks,
Brendan

That's terrific - Thanks Ben


Best regards,

Brendan

Hi Ben. Many thanks for the recent updates, with 'FC7_Latest_Files_051216' patch downloaded and applied. I noticed an issue however with pin-selectable external interrupts (specifically, for the 32MZ2048EFG144 chip that we're using). I'm setting up to monitor 20 x system fan tachos, organised as fiv...

Fantastic job ! Thanks Ben. Following your patches I can confirm that the same project now builds without issue using hardware UART. I'm presently coding in advance of the hardware, though will try to remember to confirm physical operation when possible. Unless proven otherwise - assumed fully resol...

PIC32MZ continued... I'm sure they could make a soap opera of this chip, but a recent personal observation when attempting to enable hardware UART. In simulation all is good, but the problem reveals itself at build time. To confirm, I'm working with PIC32MZ2048EFG144, using the latest Flowcode V7.1....

Hi Ben. The device concerned is PIC32MZ2048EFG144, and no bootloader. It's a bit of a handful, and we're progressively getting to know it better, though appears to set itself apart in the way you have to configure and use it. Other things seem not to make sense, such as growing silicon errata (the '...

Hi Jac. Thanks for the link, which suggests that as most chips don't support hardware flow control then the software implementation will work regardless. Regrettably however, this was not our experience with the 32MZ. After an engineer selected pins for flow control in FC7, and spending considerable...

Merely an observation for a future FC7 tweak... Working with PIC32MZ devices and hardware UART, TxD and RxD mappings are correct for the channels selected, but we observed that FC7 permits arbitrary selection of flow control pins which aren't appropriate when using hardware channels. A review of the...

:D Thanks Ben... Scares me too, though just early food for thought for the more capable 32-bit PICs in particular. We'll be running DMA for some of our projects, with C blocks managing available registers and memory space on these devices. Perhaps my rambling DMA ideas will shapen up once we've play...

Furthering the power of Flowcode 7, itself supporting 32-bit micros with extended hardware features, I'd like to throw in DMA Channeling: My rambling thoughts suggest a DMA component, enabling the user to individually nominate DMA channels afforded by the device for hardware-driven data piping direc...

Hi Ben.

Many thanks for the timely fix, and happy to confirm that the project now compiles without error


Best regards,

Brendan

A big thumbs-up for 4D products from me too. We've used their 4.3" capacitive touch displays for stand-alone test equipment featuring VI's and touch keyboards. Their Picaso processors (and faster Diablo if needed) are just the ticket for working with small MCUs as they off-load screen driving requir...

I don't normally condone registry clean-up, except where deemed absolutely necessary. In your case however, doing such a thing should clean up hidden gremlins and orphaned objects, which sounds as though it may be the most appropriate course of action if all else fails. Impossible to say whether it ...

Truly exemplary support work guys... Thank you !!!

Best regards,

Brendan

A CRC calculation component (particularly leveraging hardware CRC engines where provided) would greatly assist with coding and operational efficiency, and add significant value for advanced/professional PIC users - particularly high-speed 32-bit devices where FC7 holds key advantages. Would obviousl...

For the record, you might also like to consider a voltage-controlled (active) current sink in a regulator's feedback circuit, where PWM voltage (amplified by an op-amp for stability and offset correction) leaches current from a feedback arrangement. Imagine an N-channel MOSFET with source to ground ...

We've overcome a number of... 'challenges' getting the UART baud rate and associated registers correct for a given clock frequency with this PIC family. The following information may possibly be of some assistance when working with these complex new devices... http://stackoverflow.com/questions/1770...

Thank you Ben and all.

Your considerations and early bug resolution is truly appreciated.

Best regards,

Brendan

Hi Leigh. Thanks for the confirmation. I can say that Pladnows checks confirm that 32MX and MZ chips are affected, so common across a range of devices if this helps (we haven't checked them all). Please let me know if this is likely to take time to resolve, in-case we should need to workaround befor...

Thank you Simon et al...

Some very welcome features, bug-fixes, and updates there. You guys have been busy !

All the best,

Brendan