PPS bug?

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fotios
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PPS bug?

Postby fotios » Thu May 16, 2019 9:07 am

I'm working with a PIC16F18877 - TQFP44.

The Peripheral Pin Select (PPS) module is working OK?

I have troubles to remap the SPI CH1 and SPI CH2.

Please see this topic:
https://www.matrixtsl.com/mmforums/viewtopic.php?f=68&p=95426#p95426

Thanks
Last edited by fotios on Fri May 17, 2019 4:44 pm, edited 1 time in total.
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Re: PPS bugs

Postby Benj » Thu May 16, 2019 3:38 pm

Hello,

The code in the latest v7 16F18877 definition file looks ok to me compared to the v8 files.
viewtopic.php?f=63&t=19743

Which pins are you trying?

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Re: PPS bugs

Postby fotios » Thu May 16, 2019 10:01 pm

Benj wrote:Hello,

The code in the latest v7 16F18877 definition file looks ok to me compared to the v8 files.
viewtopic.php?f=63&t=19743

Which pins are you trying?

Hi Ben
Thanks for the confirmation.
RB.1 = SCK_2
RB.2 = MOSI_2
RB.3 = MISO_2
RB.4 = SS_2
I had ordered two RF-Solutions LoRa modules, based on Semtech SX1272, and I developed the FCF for that chip.
Unfortunately, my technical director ordered and shipped to me the new series modules (identical to the old modules) that incorporate the Semtech SX1262 which is completely different.
I will modify the FCF and let you know if the P16F18877 PPS module is working OK.
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Re: PPS bug?

Postby fotios » Fri May 17, 2019 4:51 pm

Hi everyone
The definitions of the PPS module are correct, without bugs within FC7.
Just now I modified the FCF to fit on SX1262 which of the Register map and Read/Write access is completely different from this of SX1272.
Thanks for the help
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