A block of non-functioning I/Os on 24FJ256GB106

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csouter
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A block of non-functioning I/Os on 24FJ256GB106

Postby csouter » Thu Feb 22, 2018 6:23 pm

I have a board with serial EEPROM (SPI interface), that I can not get to work. I have attached a stripped down flowcode project that I am using for test. My problem is that on this PIC, I can't get I/O Pins B10, B11, B12, or B13 to work. In the project that I have attached, Pin B1, that I am using for the SEEPROM Chip Select works just fine. As do the other B Pins (they are used by the real application, and all appear to work without problems). I am not getting my MOSI signal (Pin B11), my SCLK signal (Pin B12), and I don't seem to be able to read from my MISO pin either (Pin B13). I am also having problems with my B10 Pin (detailed in other posts). I find it strange that a block of 4 consecutive I/O Pins are not working. I have tried the application on another board, and have the same problem with that, so I have eliminated a possible bad chip. I have also taken the heartbeat LED logic (which drives Pin G8) and had the code output that to Pins B11 and B12, and I get a flat line on the scope (at a logic low). So I have eliminated the possibility that I am not writing properly to the outputs. The simulation of the code works fine. Any insight will be appreciated.

Thank you.
csouter
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csouter
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Re: A block of non-functioning I/Os on 24FJ256GB106

Postby csouter » Thu Feb 22, 2018 10:17 pm

After doing a little more digging, I decided to look at the FCDX file for the PIC24FJ256GB106. I found something curious. The I/O descriptor lines for the PORT B I/O lines are as follows. You'll notice the absence of certain parameters for the descriptions of Pins B10, B11, B12 and B13 - the very 4 pins that I am having problems with. Does anybody have any information about the format of this file, and can you tell me if that missing information may have anything to do with my problem, and if so, can you provide the information that should be included for those 4 lines?

Thank you
csouter

<pin name='AN5 / RB5' port='1' bit='5' adc='5' rpreg='RPOR9bits.RP18R' rpnum='18' />
<pin name='AN4 / RB4' port='1' bit='4' adc='4' rpreg='RPOR14bits.RP28R' rpnum='28' />
<pin name='AN3 / RB3' port='1' bit='3' adc='3' />
<pin name='AN2 / RB2' port='1' bit='2' adc='2' rpreg='RPOR6bits.RP13R' rpnum='13' />
<pin name='PGC / AN1 / RB1' port='1' bit='1' adc='1' rpreg='RPOR0bits.RP1R' rpnum='1' />
<pin name='PGD / VREF+ / AN0 / RB0' port='1' bit='0' adc='0' rpreg='RPOR0bits.RP0R' rpnum='0' />
<pin name='AN6 / RB6' port='1' bit='6' adc='6' rpreg='RPOR3bits.RP6R' rpnum='6' />
<pin name='AN7 / RB7' port='1' bit='7' adc='7' rpreg='RPOR3bits.RP7R' rpnum='7' />
<pin name='AVDD' />
<pin name='AVSS' />
<pin name='AN8 / RB8' port='1' bit='8' adc='8' rpreg='RPOR4bits.RP8R' rpnum='8' />
<pin name='AN9 / RB9' port='1' bit='9' adc='9' rpreg='RPOR4bits.RP9R' rpnum='9' />
<pin name='AN10 / RB10' port='1' bit='10' adc='10' />
<pin name='AN11 / RB11' port='1' bit='11' adc='11' />
<pin name='VSS' />
<pin name='VDD' />
<pin name='AN12 / RB12' port='1' bit='12' adc='12' />
<pin name='AN13 / RB13' port='1' bit='13' adc='13' />
<pin name='AN14 / RB14' port='1' bit='14' adc='14' rpreg='RPOR7bits.RP14R' rpnum='14' />
<pin name='AN15 / RB15' port='1' bit='15' adc='15' rpreg='RPOR14bits.RP29R' rpnum='29' />

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LeighM
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Re: A block of non-functioning I/Os on 24FJ256GB106

Postby LeighM » Fri Feb 23, 2018 2:04 pm

It looks like RB10-13 are not remappable on this device, hence no peripheral access.
Your posted program does not seem to include any SPI usage?
Have you tried these pins as a software channel SPI?

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Re: A block of non-functioning I/Os on 24FJ256GB106

Postby csouter » Fri Feb 23, 2018 2:08 pm

I thought I should at least be able to use those pins as discrete I/O pins.

Thanks
csouter

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Re: A block of non-functioning I/Os on 24FJ256GB106

Postby csouter » Mon Feb 26, 2018 2:13 pm

Found the problem = The 4 bits in question were used by the JTAG port, and Flowcode was enabling the JTAG debugger by default.
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