ATTiny85 SPI

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mnf
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ATTiny85 SPI

Post by mnf »

On the ATTiny85 (and possibly other ATTinies - not checked) SPI (USI) doesn't work in hardware mode.

With 'Channel1' - SCL gives a clock signal but no data is output on MOSI.

Using 'Software' (and all other things the same) - MOSI outputs data..
Note that it's probably not much slower (403kHz / 410kHz clock in software /hardware mode on a 16MHz chip)
at85test.fcfx
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A simple demo - outputs a number (increasing) to SPI. Tested with smartscope attached to SCL and MOSI.

Martin

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Re: ATTiny85 SPI

Post by Benj »

Hi Martin,

I've had a good go through the datasheet and the SPI code and at the moment I can't spot anything that looks incorrect. Your program is very simple and so is the onderlying code so it's a strange one.

This is the code that is included when transmitting a SPI value.

Code: Select all

			unsigned int i;
			USISR = 0;
			USIDR = DataOut;
			for (i = 0; i < 8; i++)
			{
				USICR = (1 << USIWM0) | (1 << USITC);
				delay_us(1);
				USICR = (1 << USIWM0) | (1 << USITC) | (1 << USICLK);
				delay_us(1);
			}
			retVal = USIDR;

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Re: ATTiny85 SPI

Post by mnf »

Thanks Ben,

A bit more experimentation - and hardware mode also doesn't work using the tinySPI library. Again software mode works fine.

I might play a bit more (I did a small 'C' macro for SPI output using similar code) - but again only a clock pulse - or might just stock with software mode for now.

Martin

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Re: ATTiny85 SPI

Post by mnf »

Curiouser and curiouser..

The tinySPI library did work - but output (MOSI?) is on PB1 not PB0..

I wrote a simple FC program that works for SPI hardware output - and it also has PB2 has clock PB1 as data out and (though I've not tested this) PB0 as data in. This doesn't seem to tie with the labelling of the chip - but my effort to get the pins 'exchanged' failed.
The FC component has no data on PB0 or PB1 in hardware mode.
FC_.jpg
FC_.jpg (70.51 KiB) Viewed 308 times
Output of 123 to SPI.

Note that there is no facility to alter the pins or output speed - presented as is for interest here. I haven't tested 'input' but will have a play with an EEPROM. With optimisation set to -Os it gives a clock of 1.6MHz on the clock pulse. There should be some way to alter the data rate - but I haven't investigated this.
attiny85 spi.fcfx
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Martin

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Re: ATTiny85 SPI

Post by mnf »

Hi Ben,

Any thoughts - it seems to be a case of needing to set PB1 as output instead of PB0?

Martin

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Re: ATTiny85 SPI

Post by Benj »

Hello,

It might be worth trying the SPI master component as this might give you more control over things like the clock speed and bus settings.

Looking at the device datasheet SDO (MOSI) is on B0 and SDI (MISO) is on B1 and this seems to tally with what is in the definition file.

When using the hardware mode do you get any data appearing or is the MOSI pin just silent?

I'll have a look at the peripheral and underlying CAL and make sure there are no problems there.

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Re: ATTiny85 SPI

Post by mnf »

The MOSI pin is 'silent' in hardware mode - good signal in software. Just tested again - using a smartscope connected to PB0 or PB1 (channel 1) and channel 2 to PB2 (SCL) (Both checked for output - and in hardware mode there is none (SCL is ok))

Also just checked with code above (attiny85 spi) - and output is on PB1 (I'd noticed this first using the tinySPI library - just by chance I checked PB1)

I haven't had chance to test yet - but was going to test using PB0 as input (MISO) - but I'd like to bet it will work as such.

Martin

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Re: ATTiny85 SPI

Post by mnf »

This seems to be a 'nomenclature' issue.

See https://github.com/JChristensen/tinySPI/issues/2 for example
MOSI / MISO are only used for programming purposes and DO (data out) and DI (data in) actually refer to the USI pin functions (and PB1 is DO...)

Martin

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Re: ATTiny85 SPI

Post by mnf »

Hi Ben,

Hope you had a good Christmas - any progress on this - it seems to affect all the chips with the USI interface.

Martin

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