Higher ADC resolution using oversampling:16 bits with 12

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benp
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Higher ADC resolution using oversampling:16 bits with 12

Post by benp »

It is possible to have more than 1 bit resolution with oversampling
16 bits resolution was possible with a 12 bit ADC in our tests (see text below).

A good starting document can be found here :
http://www.atmel.com/images/doc8003.pdf
For this, the noise must be 1 LSB minimum(least significant bit)

We test this with a dsPIC 30F3014(with 12 bits ADC)
No oversampling:
1862 to 1863
1 LSB
ENOB=12 (effective number of bit)

Oversampling 16
1862,1 to 1862,6
0,5 LSB
ENOB=13 bits

Oversampling 32768
1862,155 to 1862,206
0,05 LSB
ENOB=16 bits
Time 10s

Here is the test program
test_can.fcf_pic16V02.fcf_pic16
(18.86 KiB) Downloaded 151 times
This should work with 16F and 18F family but dsPIC is better for signal processing.
I didn't test yet but it should be used on new DSP macro(different ways).

It is possible to improve the ADC sampling time. I use the standard ReadAsInt Macro and I must wait for the capacitor to charge.

A good option should be to use ADC_RAW_Configure_Channel+ ADC_RAW_Sample_Channel+ADC_RAW_Disable_Channel macro but the macro " ADC_RAW_Sample_Channel" doesn't work on my tests:the program block on that macro if used.
Is this a bug for dsPIC?

Another good option would be to develop the ADC_RAW_Average_Channel(not working on my 30F3014) with a 16 bits return and not 12 bits return. In fact, it should be a sum and not average. This should be easy to do in the macro C code: no divide by count...but don't work because ADC_RAW_Sample stop the program...

Can you help for "ADC_RAW_Sample_Channel" :stop program on use
Regards
INSA 1er cycle GCP projects with or without eblocks:
http://www.youtube.com/user/INSAgcp

yannr
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Re: Higher ADC resolution using oversampling:16 bits with 12

Post by yannr »

Hi,

just for information:
the results of this test have been made with HS clock of 12 MHz.
the result with a HS/2/PLL 16x on a 30F3014 are less impressive.
Regards
INSA 1er cycle GCP projects with or without eblocks:
https://www.youtube.com/user/yricotti

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STibor
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Re: Higher ADC resolution using oversampling:16 bits with 12

Post by STibor »

Hi
I tried the 10bit ADC oversampling.
12bit is still operating, but it is inaccurate.

https://www.youtube.com/watch?v=OT_kn4s ... 8Q&index=6
Attachments
til306_ADC_4.fcf
(19.94 KiB) Downloaded 133 times

benp
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Joined: Sat Mar 28, 2009 5:44 pm
Location: LYON FRANCE
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Re: Higher ADC resolution using oversampling:16 bits with 12

Post by benp »

I did more experiments with RAW ADC. I think there is a bug(or I don't understand how it works).
My program works properly if I do:

Code: Select all

Loop 4 times
ADC_RAW_Configure_Channel
ADC_RAW_Sample_Channel_Int
ADC_RAW_Disable_Channel()
end loop
By it doesn't work if I do

Code: Select all

ADC_RAW_Configure_Channel
Loop 4 times
ADC_RAW_Sample_Channel_Int
end loop
ADC_RAW_Disable_Channel()
The program stops at the second sample

Other results with my test eblocks:
ADC is more stable a lower speed
ADC is more stable with internal RC than cristal(same speed)

Best result were found at high spedd with:
FRC PLLx16 (internal RC 117.92MHz)
Tcy*32
Regards
INSA 1er cycle GCP projects with or without eblocks:
http://www.youtube.com/user/INSAgcp

benp
Posts: 155
Joined: Sat Mar 28, 2009 5:44 pm
Location: LYON FRANCE
Contact:

Re: Higher ADC resolution using oversampling:16 bits with 12

Post by benp »

Still no answer for the ADC RAW bug...
Regards
INSA 1er cycle GCP projects with or without eblocks:
http://www.youtube.com/user/INSAgcp

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