Hi Guys,
I tried to get the dsPIC to work with internal CAN a while ago and failed.. I decieded to go basic to basics today but I am still mystified.
I have an ECIO40P16 in a ECIO breakout board + EB018 CAN board and a second CAN device to respond to the messages. Its all monitored with a CANalyser and Decoding scope.
The CAN board is supplied 5V.
Using the CAN E-block and MCP2515 External CAN controller chip the following Flowcode works as expected.
So to my mind I now have a proved and working test setup.
Then...In Software
Flowcode CAN component to channel Internal 1
Set Pin D6 to Tx, Pin D5 to Rx
For the Hardware
Remove the MCP2515 controller chip
Link Pin D6 to Transceiver Pin 1 (via pin1 of MCP2515 socket)
Link Pin D5 to Tranciever Pin 4 (via Pin2 of MCP2515 socket)
But the output on the bus is now garbage, the other CAN device is not happy because it does not get any acknowledgement of its frames.
There is output on Pin D6 but it does not look much like the CAN message data.
I tried swapping the RX/Tx pins in hardware, No change.
has anyone got dsPIC and internal CAN working or can you see anything stupid I have done?
Cheers, J.
dsPIC ECIO40P16 and internal CAN
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- Jay Dee
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dsPIC ECIO40P16 and internal CAN
Hi, I'm pretty sure there is not a hardware issue..as I'm only removing the controller IC and putting in two jumper wires.
But when I do so the decoding scope reports Form Errors in previous good message packets, microchip describe Form errors as
Can anyone confirm if they have internal CAN working on the dsPIC and post a working FC prog.
I may just be being stupid on some setting and I'm cautions of crying !BUG!
Any thing to try let me know. I'm keen to deploy the dsPIC in a new project but without a proven internal CAN (on my bench) its not sensible.
Thanks, J.
But when I do so the decoding scope reports Form Errors in previous good message packets, microchip describe Form errors as
The 'message repeat' part certainly seems true, as I see a real stream of data on hte bus but all the other nodes just get upset and take themselves off the bus.If a node detects a dominant bit in one of the four
segments (including end-of-frame, interframe space,
acknowledge delimiter or CRC delimiter), a form error
has occurred and an error frame is generated. The
message is repeated.
Can anyone confirm if they have internal CAN working on the dsPIC and post a working FC prog.
I may just be being stupid on some setting and I'm cautions of crying !BUG!
Any thing to try let me know. I'm keen to deploy the dsPIC in a new project but without a proven internal CAN (on my bench) its not sensible.
Thanks, J.
- LeighM
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Re: dsPIC ECIO40P16 and internal CAN
Hi J.
I suspect that the baud rate configuration isn't getting set properly for the 140MHz clock.
If you want to have a look at the clock prescaler and phase length bits in the datasheet for C1CFG1 and C1CFG2
and work out what's best and force the values into C1CFG1 and C1CFG2 in the PIC16BIT_CAL_CAN.c code.
See around line 370 ...
as it could be a while before I get chance to have a look, but will certainly try.
Hope that helps.
Leigh
I suspect that the baud rate configuration isn't getting set properly for the 140MHz clock.
If you want to have a look at the clock prescaler and phase length bits in the datasheet for C1CFG1 and C1CFG2
and work out what's best and force the values into C1CFG1 and C1CFG2 in the PIC16BIT_CAL_CAN.c code.
See around line 370 ...
Code: Select all
// Set baudrate registers
C1CFG1 = MX_CAN_BAUD1_X;
C1CFG2 = MX_CAN_BAUD2_X | (MX_CAN_BAUD3_X << 8);
Hope that helps.
Leigh
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Re: dsPIC ECIO40P16 and internal CAN
Well Flippin' eck!! I might have learnt something tonight.. haha!!
Leigh, I read out the C1CFG1 C1CFG2 C1CTRL1 and C1CTRL2 registers, displayed them on the LCD and compared them to the DataSheets.
I toggled bit 11 of C1CTRL1 and its all working fine.
Its register value CANCKS ECAN Module Clock Source Select (Datasheet page362).
Its blind luck though.. this action halved the FCAN (Internal CAN Oscillator Freq) and I've only tested at 1Mbit... so tweaking the Baud Pre-scaler bits may be the better (or correct) way.
I did not really know how to interpret the values I had.
Register C1CFG1 returned 6,
For this value the datasheet gave the Baud Rate PreScaler (TQ) as 7 which gave the following equation 7 = 2 x 3 x (1/FCAN)
FCAN is either the same as the peripheral frequency (Fp) or twice the value, depending on the CANCKS bit.
Anyways..all looks pretty good on the bench and should do until someone who really knows what they are doing can check it
And I learnt to read and set register values! haha
Thanks for the pointer. J.
Leigh, I read out the C1CFG1 C1CFG2 C1CTRL1 and C1CTRL2 registers, displayed them on the LCD and compared them to the DataSheets.
I toggled bit 11 of C1CTRL1 and its all working fine.
Its register value CANCKS ECAN Module Clock Source Select (Datasheet page362).
Its blind luck though.. this action halved the FCAN (Internal CAN Oscillator Freq) and I've only tested at 1Mbit... so tweaking the Baud Pre-scaler bits may be the better (or correct) way.
I did not really know how to interpret the values I had.
Register C1CFG1 returned 6,
For this value the datasheet gave the Baud Rate PreScaler (TQ) as 7 which gave the following equation 7 = 2 x 3 x (1/FCAN)
FCAN is either the same as the peripheral frequency (Fp) or twice the value, depending on the CANCKS bit.
Anyways..all looks pretty good on the bench and should do until someone who really knows what they are doing can check it
And I learnt to read and set register values! haha
Thanks for the pointer. J.