Add clock stretching to I2C component

[medelec35]

It would be much better if I2C component has clock stretching added which pauses master until slave is ready.
Then Loops or delays to wait for slave to be ready won't be required.
Would simplify flowchart so less ROM is used n target device.

Martin

[LeighM]

I've put it on the list - thanks, Leigh

[Benj]

Hello,

I'm looking into this and I'm probably missing something.

I'm looking at the 24EPxxxGU datasheet at the I2C control registers.

There are clock stretching control bits however they all seem to relate to the I2C being in slave mode. Is clock stretching a function of the master or the slave? I feel I had better do a bit more research to understand what clock stretching does.

[Benj]

Right I found this page which has some good info.

http://stackoverflow.com/questions/2486 ... stretching

Looks like we need to revisit our software I2C layer to add the ability to wait for the SCL to float high after we release it.

I'm hoping that hardware I2C master will already do this automatically?


Here are the modded CAL files for v7 which hopefully add clock stretching support for the software channels in master mode.

PIC_CAL_I2C.c

(21.53 KiB) Downloaded 266 times

AVR_CAL_I2C.c

(25.72 KiB) Downloaded 243 times

PIC16BIT_CAL_I2C.c

(24.85 KiB) Downloaded 239 times

PIC32BIT_CAL_I2C.c

(12.61 KiB) Downloaded 254 times

ARM_CAL_I2C.c

(16.47 KiB) Downloaded 269 times

[medelec35]

Thanks Ben,

Looks like we need to revisit our software I2C layer to add the ability to wait for the SCL to float high after we release it.

That's how how i believed it worked.
Master pauses until slave releases the line.

I will have a play and let you know how I get on.

[medelec35]

Hi Ben,
Unfortunately the update (PIC) has stopped i2c from working.
I not not yet modified it for clock stretching.

Martin

[Benj]

In the I2C CAL File I basically changed these lines in the master transmit byte and receive byte functions.

Code: Select all

MX_I2C_DELAY;
FC_CAL_Bit_In_DDR(MX_I2C_SCL_PORT_X, MX_I2C_SCL_TRIS_X, MX_I2C_SCL_PIN_X);		                        //Set SCL High
MX_I2C_DELAY;
FC_CAL_Bit_Low_DDR(MX_I2C_SCL_PORT_X, MX_I2C_SCL_TRIS_X, MX_I2C_SCL_PIN_X);		                //Set SCL Low

To these lines.

Code: Select all

MX_I2C_DELAY;
FC_CAL_Bit_In_DDR(MX_I2C_SCL_PORT_X, MX_I2C_SCL_TRIS_X, MX_I2C_SCL_PIN_X);		                        //Set SCL High
MX_I2C_DELAY;
while (FC_CAL_Bit_In_DDR(MX_I2C_SCL_PORT_X, MX_I2C_SCL_TRIS_X, MX_I2C_SCL_PIN_X) == 0);		//Wait for the clock to go high - Clock stretching.
FC_CAL_Bit_Low_DDR(MX_I2C_SCL_PORT_X, MX_I2C_SCL_TRIS_X, MX_I2C_SCL_PIN_X);		                //Set SCL Low

Maybe the while is having a negative effect?

[Benj]

Aha,

FC_CAL_Bit_In_DDR doesn't return a value. You have to instead use FC_CAL_Bit_In.

Hopefully this will work better.

PIC_CAL_I2C.c

(21.48 KiB) Downloaded 251 times

Now looks like this.

Code: Select all

MX_I2C_DELAY;
FC_CAL_Bit_In_DDR(MX_I2C_SCL_PORT_X, MX_I2C_SCL_TRIS_X, MX_I2C_SCL_PIN_X);                              //Set SCL High
MX_I2C_DELAY;
while (FC_CAL_Bit_In(MX_I2C_SCL_PORT_X, MX_I2C_SCL_PIN_X) == 0);                                           //Wait for the clock to go high - Clock stretching.
FC_CAL_Bit_Low_DDR(MX_I2C_SCL_PORT_X, MX_I2C_SCL_TRIS_X, MX_I2C_SCL_PIN_X);                      //Set SCL Low

[Benj]

At the moment in the new CAL file clock stretching is enforced i.e. always on.

Would it be better if there was a property in the component to turn it back off for software mode or should it always be enforced to better match what the hardware mode does?

[medelec35]

Hi Ben,
Works really well in deed.
Removed all the delays so just got:

Clockstretching2.png

(18.43 KiB) Downloaded 4058 times

Before changing sensor command from No hold master to hold master, the reading without delays are totally wrong.
Changing to hold master then recompile and got:

Clock stretching1.png

(47.01 KiB) Downloaded 4058 times

Now compare with SHT21 component:

Clock stretching3.png

(19.37 KiB) Downloaded 4058 times

Conclusion is using clock stretching there are less errors so readings are more stable.

Would it be better if there was a property in the component to turn it back off for software mode or should it always be enforced to better match what the hardware mode does?

I'm not sure.
My guess is leaving it on then if not clock stretching supported then delays or loops can be added.

Martin

[Benj]

Thanks Martin,

I've rolled out the change so clock stretching is now active for software channels on all of the CALs.

[medelec35]

Your welcome.
Thank you for implementing so fast.

Martin